The present invention relates to a microcomputer application system for executing a program stored in a memory and a technique for a signal processing system.
In recent years, as the operating speed of microcomputers has been increased, microcomputer application systems, represented by built-in microcomputer systems, are required to be operated at higher and higher operating speed. On the other hand, the operating speeds of peripheral circuits such as memories and interfaces have not yet made to be as high as that of microcomputers. Moreover, with increase in the size of software and reduction in development periods, there are an increased number of cases in which a rewritable memory is used as a memory for storing software in order to avoid risks. Furthermore, the configuration of software has become more complicated with increase in the size of software, thus increasing burdens on software developers.
Hereinafter, a known microcomputer application system will be briefly described.
FIG. 8 is a block diagram illustrating a first known example which allows high-speed operation. In FIG. 8, an MPU 51 fetches data of a control program PG in an internal ROM 54 via a bus 53 and then executes the control program. Normally, for a memory in a microcomputer 50, the access speed for data fetch via the bus 53 is optimized. With a configuration shown in FIG. 8, the program PG for controlling the microcomputer 50 can be executed at high speed by high-speed fetch. The internal ROM 54 is formed of, for example, a masked ROM or a rewritable flush ROM for the purpose of avoiding risks.
FIG. 9 is a block diagram illustrating a second known example including a large scale memory. In a configuration shown in FIG. 9, an external ROM 60 is connected to the bus 53. The control program PG is stored in the external ROM 60. The MPU 51 fetches the control program PG in the external ROM 60 via the bus 53 and executes the control program PG. The external ROM 60 is normally a general purpose ROM. Therefore, in many cases, the external ROM 60 can be accessed only at a very low speed, compared to an internal ROM. The external ROM 60 is formed of, for example, a rewritable, general purpose flush ROM.
FIG. 10 is a block diagram illustrating a third known example which allows a high-speed operation. In a configuration shown in FIG. 10, a microcomputer 50B includes a cache RAM 54 and a cache circuit 55 and has a configuration of a so-called “cache microcomputer”. The MPU 51 fetches the control program PG of the external ROM 60 via the bus 53 and executes the control program PG. However, the access speed of the external ROM 60 is low, and data for an address which is frequently accessed is dynamically registered in the cache RAM 54. Then, the cache circuit 55 switches between accessing the external ROM 60 and accessing the cache RAM 54.
Problems That the Invention is to Solve
However, with the known configurations, the following problems arise.
As in the first known example, when a system with an internal ROM uses a masked ROM as the internal ROM, it is very difficult to correspond to requests for avoiding risks such as program problems, which have recently increased. Moreover, when a rewriteable ROM is used as the internal ROM, process steps for fabricating a microcomputer has to include different process steps for a logic circuit and a rewritable ROM (i.e., so called an “embedded process”), thus resulting in very high costs.
Moreover, as in the second known example, in a system using an external ROM, the access speed is much lower than that of a system using an internal memory. Therefore, in the case of control requiring a high-speed operation, it is very difficult to achieve a stable operation.
Moreover, as in the third known example, when a cache microcomputer is used, a high-speed operation can be achieved. However, the configuration of the mechanism for a cache becomes very large scale and complicated. Therefore, for example, for a built-in microcomputer, such a mechanism might be too excessive and also costs might become too expensive.